Design of Washing Machine Controller Based on VHDL

Abstract : In order to reduce design cost and shorten design cycle, a design scheme of washing machine controller based on VHDL is proposed. The solution adopts a modular design concept and uses a state machine to complete the design of the control module. The entire system was designed, compiled, and simulated on the Quartus II development platform and tested on the FPGA hardware lab. The simulation waveform and test results show that the design is feasible.

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In order to improve the intelligence of the washing machine control system, as well as the timing and speed accuracy, the current washing machine control system usually uses digital circuits instead of the traditional mechanical control. With the development of EDA (Electronic Design Automation) technology, the design and simulation of electronic systems on EDA development software using hardware description language and downloading to programmable logic devices has become a new trend in digital circuit design. .

Compared with the traditional digital circuit design method, EDA technology has the following characteristics: 1) designing hardware by software; 2) converting system-to-hardware system designed by software is automatically completed by relevant development software; 3) design process The software can be used for various simulations; 4) the system can be programmed in the field and upgraded online; 5) the whole system can be integrated on one chip, which is small in size, low in power consumption and high in reliability; 6) good portability and efficiency of design High; 7) Suitable for division of labor design, teamwork; 8) Low design cost and short design cycle. Based on this, we use the hardware description language VHDL to complete the design, compilation and simulation of the washing machine controller on the EDA mainstream development software Quartus II, and download it to the FPGA hardware experiment box for testing. The test results show that the design is feasible.

1 overall design

Through the investigation of the washing machine controller on the market, the design of the washing machine control system needs to realize the functions of washing mode selection, water level control, washing motor control, washing status, water level and remaining time display. The specific functions are as follows: 1) It can set the washing mode, water level, washing time, rinsing time and dehydration time; 2) set different motor speed according to different washing modes; 3) can pass the digital tube and LED display light Display the water level, the remaining time of the laundry, the status of the current laundry, etc.; 4) Can pause at any time during the washing process, continue to start the laundry from the state before the suspension; 5) Can realize the system reset function, press the reset button to make the washing machine system Return to the starting state.

Design of Washing Machine Controller Based on VHDL

According to the function of the washing machine controller, four modules are set, which are a button selection module, a counting module, a control module and a time display module. The system block diagram is shown in Fig. 1. Based on the modular design concept, the design is based on a top-down hierarchical design method. The inputs are: start signal, pause signal, various user setting signals, 1 Hz timing clock signal and 1 kHz scan clock signal; It is: the current state remaining time display (2-digit common cathode 7-segment digital tube display), laundry status, motor control signal, water level and water inlet signal.

2 core module design

2.1 button selection module design

The washing process of the washing machine is divided into four stages: water inlet→washing→rinsing→dehydration. The water intake time is determined by the amount of water. The water volume is set to high, medium and low, and the user selects by dialing the two water volume setting buttons. When the user does not dial any button, that is, when the button value is 00, the water amount is set to the default value: mid-range, 4 liters. Table 1 shows the correspondence between the water volume setting button and the water volume and water intake time.

Design of Washing Machine Controller Based on VHDL

The washing, rinsing and dehydration times are determined by the laundry mode. We divide the laundry mode into automatic settings and manual settings. In the manual setting, the user sets the washing, rinsing and dehydrating time by dialing the three sets of manual laundry setting buttons: the washing setting button, the rinsing setting button and the dehydrating setting button. Table 2 shows the correspondence between the three sets of setting buttons and the washing, rinsing and dehydration times. When the user does not dial any button, the time takes the default value, that is, the mid-range (the corresponding time when the button value is 10)

Design of Washing Machine Controller Based on VHDL

The automatic setting mode includes: strong, common, and gentle three laundry modes, and the user selects by dialing two automatic laundry mode selection keys. When the user selects the automatic setting mode, the controller will automatically set the corresponding washing time, rinsing time, and dehydration time according to the laundry mode selected by the user. Table 3 shows the washing, rinsing and dewatering times for different laundry modes.

Design of Washing Machine Controller Based on VHDL

It should be noted that the automatic setting mode has a higher priority than the manual setting mode. If the user mishandles and simultaneously dials the automatic laundry mode selection button and the manual laundry time setting button (this situation is easy to happen), the washing machine controller considers that the automatic laundry mode is selected, and the module will output according to the selected automatic laundry mode. Corresponding time and washing speed to the control module. When the user does not dial any of the automatic laundry mode selection keys, the manual setting mode is selected by default. Interestingly, when the automatic laundry mode selection button and the manual laundry time setting button are not toggled, that is, the user directly starts the washing machine, the default value (mid-range) of the manual setting mode is selected. At this time, the washing, rinsing, and dehydrating times were 15, 20, and 5 minutes, respectively, which is exactly the same as the usual laundry mode in the automatic setting mode. This laundry mode is the most commonly used mode. With this default setting, the user can effectively avoid complicated choices and directly start the washing machine.

Regardless of the laundry mode selected, the logic control process of the washing motor is always the same: during washing and rinsing, the motor is continuously operated for 5 seconds in the washing speed, suspended for 1 second, and then continuously operated for 5 seconds at the same washing speed. , pause the work for 1 second, so cycle the motor until the end of the washing and rinsing time; when dehydrating, the motor continuously works for 5 seconds in the forward direction of 600 rpm, pause the operation for 1 second, so cycle the motor until the dehydration timing End. The washing speed of the washing motor will be adjusted according to the washing mode, and the default speed is 60 rpm. When the laundry mode is strong, the motor speed is increased to 72 rpm; when the laundry mode is gentle, the motor speed is reduced to 45 rpm; while other modes, including the manual setting mode, use the default speed of 60 rpm.

The main function of the button selection module is to summarize according to various setting buttons that the user dials, such as water volume setting, automatic laundry mode selection, manual laundry time setting, according to the relationship between various setting buttons and control information provided above. The output water, washing, rinsing, dehydration time, washing speed to the control module control the washing process, output the total laundry time to the counting module control count, and output the water level signal to control the LED display of the water level display.

2.2 Counting module design

The input to the counting module is the total laundry time total from the button selection module, the 1 Hz timing clock signal, and the reset and pause signals. The counting module implements counting from 0 to total and outputs the count to the control module. The counting initial value num of the counting module is zero, and the counting value num is incremented by one every one clock cycle. When num

2.3 Control module design

The control module is the core module of the washing machine controller. It controls the conversion of the four states of the laundry and the motor speed according to various control information input by the button selection module and the timing information input by the timing module, and outputs the current laundry state, the motor speed, and the remaining time.

The conversion of the four states of laundry can be facilitated by the state machine. A state machine is a sequential circuit whose output is determined by the current state and the current input. It can usually be represented by a state transition diagram. Using the VHDL design state machine does not need to know the specific implementation details of the circuit, just need to describe it logically, so it is a very convenient method to implement the control module with the state machine.

The state machine is implemented in VHDL with a common format. It contains two processes: the state machine state transition process Change_State and the state machine output process Output_Process. The state transition process is determined by the state transition diagram, and the state transition diagram of the washing machine is as shown in FIG. 2, and S0, S1, S2, S3, and S4 are inflow, washing, rinsing, dehydrating, and ending states, respectively, n0, n1, n2. N3 represents the water inflow, washing, rinsing and dehydration time output by the button selection module, num is the washing machine running time output by the counting module, and reset is the washing machine starting signal. When the washing machine starts, the reset button is toggled, enters the S0 state, and starts to enter the water; when the washing machine runs time num=n0, the water inlet is completed, the state changes to S1, and the washing starts; when the washing machine runs time num=n0+n1 The washing is completed, the state is changed to S2, and the rinsing is started; when the washing machine running time num=n0+n1+n2, the rinsing is completed, the state is changed to S3, and dehydration is started; when the washing machine running time num=n0+n1+n2+n3 The dehydration is completed, the state is changed to the end state S4, and the washing is stopped.

Design of Washing Machine Controller Based on VHDL

The VHDL code for the state transition process is as follows:

Design of Washing Machine Controller Based on VHDL

When reset=1, the process is started, and the current state state is set to S0. Whenever the scan clock scan_clk is a rising edge, the process is started, and the new current state is determined according to the state transition map according to the current state state and the washing machine running time num.

The output process controls the current state of the laundry by outputting four types of laundry status signals to control the four LED lights. The output process controls the incoming water by outputting an incoming water signal. When the laundry is in the water inlet state, if the pause signal is 0, the output water input signal is 1 and the water inlet is started; if the pause signal is 1, the output water inlet signal is 0, and the water inlet is suspended. When the laundry is in other states, the output water input signal is always 0, and the water is stopped. The output process controls the motor operation by outputting motor control signals. According to the logic control process of the washing motor, when the washing state is water inlet, the output motor control signal is zero level, indicating that the motor is paused; when the washing state is washing and rinsing, the output motor control signal is the frequency of washing speed (default 60 The square wave of revolutions per minute, ie 1 Hz, lasts for 5 seconds (by default, 5 square waves of 1 Hz are output), then the high level lasts for 1 second (controls the polarity of the motor); when the washing state is dehydration, the output motor is controlled. The signal is a square wave with a frequency of dehydration speed (600 rpm, ie 10 Hz) for 5 seconds (by default, 50 square waves of 10 Hz are output), then the zero level lasts for 1 second (control motor pause). The output process outputs the current state remaining time to the display module according to the current state and the washing machine running time. For example, when the laundry is in the washing state, the remaining time of the output is n0+n1-num.

2.4 display module design

This module is used to display the current state remaining time on the 7-segment digital tube. The input is the current state remaining time and scan clock output by the control module. First, the remaining time of the input is converted from seconds to minutes (rounded off); then the division is divided into individual ge and ten shi (apparently the remaining time does not exceed 100 minutes, up to 2 digits); finally through dynamic scanning at 2 The seven-segment digital of the common cathode alternates between a single digit and a ten digit. When the alternating frequency is higher than 28 Hz, the two digits appear to be simultaneously displayed on two seven-segment digital tubes due to the visual residual effect of the human eye. The VHDL code of the dynamic scanning process is as follows:

Design of Washing Machine Controller Based on VHDL

3 Conclusion

Based on the modular design concept, we use VHDL language to complete the design, compilation and simulation of the washing machine controller on the Quartus II software development platform, and download it to the FPGA hardware experiment box for testing. The simulation waveform and test results show that the washing machine can correctly realize various design functions, and the design scheme is feasible.

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