Tensilica launches HiFi 3 audio DSP IP core

Tensilica announced on January 9 that it has launched the HiFi 3 audio DSP (Digital Signal Processor) IP core for (SoC) system-on-chip design. Tensilica's fourth-generation audio DSP provides high-performance and low-power audio post-processing and voice processing algorithm functions, which are used in smartphones and home entertainment systems, while improving the performance of the industry-leading HiFi design architecture from 24-bit To 24/32 bits. Tensilica has licensed HiFi 3 to top smartphone original equipment manufacturers and top semiconductor manufacturers.

Larry Przywara, Senior Director of Multimedia Marketing at Tensilica, said: "HiFi 3 DSP is an upgraded version of the HiFi 2 architecture. HiFi 2 is the industry's most popular audio DSP core and has been applied to millions of smartphones, Blu-ray players, digital TVs, In digital cameras and other devices, HiFi 3 was originally designed to meet the power consumption efficiency requirements of smartphone original equipment manufacturers and semiconductor manufacturers for high-performance voice and audio post-processing functions. In particular, it is necessary to point out that it affects audio and video The performance of the FFT (Fast Fourier Transform), FIR (Finite Impulse Response) and IIR (Infinite Impulse Response) algorithm function libraries on the HiFi3 DSP is improved by 80%. In addition, compared to HiFi EP, HiFi 3 The performance of the speech coding has been improved by more than 1.5 times, and the substantial performance improvement helps significantly reduce the power consumption of complex algorithms. "

The HiFi 3 audio / speech DSP can be backward compatible with the proven HiFi 2 and HiFi EP audio / speech DSP software algorithm libraries. The existing more than 90 audio and speech codecs and audio enhancement algorithm libraries based on HiFi optimization are both Can run on the HiFi 3 DSP core, while greatly improving its performance. In addition, Tensilica has further optimized the most demanding multi-channel audio algorithm library to make it run more efficiently on HiFi 3. For example, HiFi 3 can support Blu-ray playback of DTS-HD Master Audio at 233 MHz. HiFi 3 retains the advantages of HiFi2, provides convenient programmability, and is very suitable for users who wish to port their own audio algorithms, using a simplified programming model to increase the rate of code writing.

Demand growth in audio post-processing and speech

Most of the current audio technology innovations focus on complex algorithms in the field of audio post-processing, such as volume adjustment, dialogue clarity, volume increase, spatial expansion, equalization, and support for 32 or more simultaneous audio streams and VoIP in interactive games (Internet Voice Protocol). These complex algorithms are widely used in the design of smartphones, home entertainment systems and game consoles.

The demand for voice on smartphones greatly exceeds Moore's Law and battery technology. The current narrow-band speech codec technology and basic noise suppression technology require audio DSP performance of approximately 200MHz. With the widespread use of AMR-WB (adaptive multi-rate wideband) speech coding technology, and Skype SILK for VoIP Broadband codec technology, improved noise suppression technology and other pre-processing functions, such as the widespread application of noise-based volume control technology, this number will exceed 600MHz within a few years.

Meet these needs

In order to meet the growing new demands in audio, HiFi 3 audio / speech DSP, for the commonly used FFT, FIR and IIR algorithms in post-processing algorithms, performance has been improved by more than 80%. Compared with HiFi EP, HiFi 3 has 1.8 times higher DTS-HD Master Audio post-processing performance. HiFi 3 optimizes the commonly used algorithms in ITU's voice codec, bringing a performance improvement of more than 50%, while greatly reducing the difficulty of migration.

HiFi 3 audio / speech DSP is a 3-channel ultra-long instruction word DSP, based on Tensilica's Xtensa data processor (DPU) architecture, with 4 MACs (multiply-accumulate unit), a 64-bit load / store unit, and a standard 16 entry 64 bit register file.

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